Layout issues, techniques, and IO placement strategies.
Learning Outcome
- Understand common challenges in circuit layout and how to resolve them for improved performance
- Learn advanced techniques to optimise circuit layout using best practices
- Gain expertise in strategically placing IO pads to ensure functionality and efficient design
Methodology
This course will be conducted in a workshop fashion, whereby the basic theory and concepts will be presented, followed by hands-on practice and exercises.
Pre-requisite
- Basic knowledge of electronic circuits and semiconductor devices
- Familiarity with analog design principles
- Basic understanding of Cadence Design Software
Duration
2 Days
Target Group (who should attend)
- Electrical and electronic engineering students
- Practising engineers and professionals in the semiconductor industry
- Researchers and academicians interested in analog IC design
Day 1
- Layout Issues
- Layout Techniques
Day 2
- IO Placement
